Milk-V recently released specifications for the Milk-V Vega which is described as the first RISC-V 10 Gigabit Ethernet Switch implemented on the FSL1030M network switch chip. The company also mentions that the device is built on an open-source Linux system.

The product announcement highlights that the FSL91030M is based on the UX608 uCore by Nuclei System Technology. The uCore also supports the RV32/64 IMACFDPB instruction set, features a 6-stage variable-length pipeline architecture and incorporates a 64-bit AXI system bus interface.

    

The FSL91030M integrates a comprehensive range of networking capabilities. It incorporates 8 ports of gigabit Ethernet PHY that support various functionalities including 10/100/1000BASE-T and 100BASE-FX. Moreover, the board integrates 2 ports of 10G SerDes, enabling 1000BASE-X, SGMII, QSGMII, O-USGMII, and 10GBASE-R.

  

Similarly, the FSL91030M offers 4 ports of 1G SerDes designed to support 1000BASE-X and SGMII functionalities. For more details, please refer to the table below.

   

Furthermore, the uCore is compatible with standard JTAG and cJTAG debugging interfaces, along with compile toolchains compliant with the RISC-V standard, and graphical integrated development environments (IDEs) for both Linux and Windows.

Network Features Support listed for the listed Milk-V Vega:

• Network Redundancy and Protection
  • Spanning Tree Protocol (STP), Rapid Spanning Tree Protocol (RSTP)
  • 1+1/1:1 Port Protection, Link Aggregation
• Quality of Service Optimization
  • QoS based on 802.1p/DSCP
  • VLAN-based translation, L2 multicast
• Security and Filtering
  • Defense against Denial of Service (DoS) attacks, protocol packet filtering
  • Black and white lists, IEEE 802.1x
• Advanced Feature Support
  • On-chip packet buffering, ACL, QinQ
  • Support for hierarchical Policing
  • VLAN based on port, protocol, IP subnet, and flow
• Flexible Queue Scheduling
  • 8 queues per port, multiple scheduling methods (SP/WRR/DWRR)
  • Optimized performance with hybrid scheduling methods
• Traffic Shaping and Control
  • Port-based single-rate shaping
  • Queue-based dual-rate shaping
  • Storm control, L2 bridging
• Management and Monitoring
  • Image and remote configuration
  • Hardware periodic transmission of OAM packets
  • Synchronous Ethernet (SyncE), 1588 functionality

Milk-V Vega features offered for developers:

• Built on an open-source Linux system, enabling easy secondary development and DIY.
• Open access to openSBI, u-boot, and Linux kernel source code, along with a provided cross-compilation toolchain.
• Equipped with a JTAG interface for convenient low-level development.
• Furnished with RS232 and I2C interfaces, allowing for the connection of other sensors.
• Supports standard 1U server racks, with the capability to install 2 Milk-V Vega units per rack layer.
• Features dual 10-gigabit optical ports + 4 gigabit optical ports + 8 gigabit Ethernet ports, catering to homelab needs.
• Supports remote configuration through WEB and SSH access.
• Provides command-line business configuration for functions such as VLAN setup, port mirroring, MAC address learning, and traffic control.
• Offers interface SDK and API for flexible implementation of business configurations.

Further information

Pricing information for the Milk-V Vega has not been revealed by MILK-V. The product announcement can be found here and the product page is available on the official MILK-V website. Additional technical information might be found on the Milk-V Wiki pages in the near future.