NXP unveiled a Linux-driven, energy-efficient “i.MX93” SoC for IoT with 1x or 2x 1.7GHz Cortex-A55 cores, 2D GPU, 250MHz Cortex-M33, NXP EdgeLock security, and options including a 1-TOPS Arm Ethos-U65 microNPU and Azure Sphere security.

NXP announced the first of several i.MX9 processors, which offer improved security and power management and an optional 1-TOPS Arm Ethos-U65 microNPU. NXP’s first i.MX9 chip is a low-end i.MX93 model that focuses on energy efficient IoT applications, including battery-powered devices. The i.MX93 is equipped with 1x or 2x 1.7GHz Cortex-A55 cores, a 250MHz Cortex-M33, and an optional 1-TOPS, 256 MACs/cycle Arm Ethos-U65 microNPU.

The i.MX93 is equipped with a 2D-only graphics GPU with support for up to 1080p60 encode and decode with MIPI-CSI and -DSI and 720p60 for LVDS and parallel interfaces. The GPU supports blending/composition, resizing, and color space conversion. Applications include voice-assisted smart home and building systems, low-power industrial gateways, and automotive driver monitoring systems.

i.MX935/i.MX933 block diagram (left) and major features for i.MX93 SKUs, including future, reduced-feature i.MX932
(click images to enlarge)

The Dutch chipmaker announced the i.MX9 platform in March without revealing specific models, CPU architectures, or core counts. The i.MX9 processors use TSMC’s 16/12nm FinFET fabrication process, compared to 28nm for the top-of-the-line, hexacore Cortex-A72 and -A53 i.MX8 QuadMax and 14nm for some of the newer i.MX8 models including the quad-core -A53, 1.8GHz i.MX8M Plus.

The tiny i.MX933 is more like the 1.5GHz, up to up to quad-core -A53 i.MX8M Nano or up to quad-core -A35i.MX8X. Perhaps a closer equivalent would be the earlier, lower-powered Cortex-A7 SoCs such as the single-core i.MX6 UL and i.MX6 ULL or dual-core i.MX7 and single-core i.MX7ULP.

The i.MX93 is available in several flavors, as seen in the chart above. These are led by the Ethos-U65 equipped, single- or dual-core i.MX935, followed by the single- and dual-core i.MX933 models, which lack the microNPU.

There will be two reduced feature, 9 x 9mm i.MX932 single-core models with 138 I/O pins that will follow the launch of the 11 x 11mm, 198-pin i.MX935 and i.MX933. (There is also mention of future 14 x 14mm models, which match the footprint of the smallest i.MX8 SoCs such as the i.MX8M Nano.)

The future i.MX932 models will be available with or without the microNPU and will be limited to single parallel display and camera I/Os. By comparison, the i.MX935 and i.MX933 provide parallel, 4-lane MIPI-DSI, and 4-lane LVDS displays plus parallel and 2-lane MIPI-CSI camera interfaces. The i.MX932 has single GbE and USB 2.0 interfaces instead of 2x of each, and it offers 3x instead of 7x I2S TDM audio I/Os.

In addition to these variants, there will be a i.MX93-CS model that supports Microsoft’s Azure Sphere security platform. The i.MX93-CS integrates the Microsoft Pluton security chip enabled on an NXP EdgeLock secure enclave as the secured root of trust. The Linux-based Azure Sphere OS is designed to work with Microsoft’s cloud-based Azure Sphere Security Service.

The i.MX93-CS will follow a soon-to-ship, Azure Sphere equipped i.MX8ULP-CS, a variant of an i.MX8ULP processor family that was announced with the i.MX9. This follow-on to the i.MX7ULP offers up to 2x 1GHz Cortex-A35 cores, a Cortex-M33, and a 3D GPU.

 
AI, power management, and security enhancements

The i.MX93 debuts Arm’s power efficient Ethos-U65 microNPU, which is designed to work closely with the Cortex-M33 MCU for low-latency speech and face recognition, object detection, and pose estimation. Unlike the earlier 0.5-TOPS Ethos-U55, the 1-TOPS Ethos-U65 can also accommodate the latency of the DRAM used on Cortex-A platforms. (For more on the Ethos-U65, see our earlier i.MX9 report.)

Features that are shared by all the i.MX9 processors include Energy Flex power management and EdgeLock security. Energy Flex provides “fine-grained power control” to optimize energy efficiency. Built around an NXP-made RISC-V PMIC, the subsystem can govern more than 20 different power mode configurations to as low as 30 microwatts.

EdgeLock offers a its own dedicated security core, internal ROM, and secure RAM to create a security enclave. Features include autonomous management of security functions such as silicon root of trust, run-time attestation, trust provisioning, tamper detection, and SoC secure boot enforcement. Other features include fine-grained key management, extensive crypto services, and simplified security certifications. (For more on Energy Flex and EdgeLock, see our i.MX9 report.)

The i.MX93 offers error correcting codes (ECC) within most of its internal memories and supports inline ECC on external, 16-bit LPDDR4X, which appears to be limited to a maximum of 4GB RAM. There is also support for eMMC 5.1 and 3x SD/SDIO 3.01.

One of the two GbE interfaces supports EEE, AVB, IEEE 1588, and TSN. Other I/Os include 2x CAN-FD and multiple UART, SPI, I2C, I3C, ADC, and more, as seen in the block diagram. The SoC will be available in operating ranges from 0 to 95°C to -40 to 125°C. There is a longevity guarantee of 10-15 years.

The i.MX93 ships with a Yocto-based Linux BSP with quarterly updates. There is also support for FreeRTOS for the MCU. Machine learning application development for the i.MX93 and its microNPU is enabled by NXP’s eIQ software development environment, including eIQ Toolkit workflow tools, a GUI-based eIQ Portal development environment, and eIQ inference engine options.

 
Further information

No pricing or availability information was provided for the i.MX93. More information may be found in NXP’s announcement and product page.