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CERBERUS2100: A Multi-CPU Open-Source Educational Microcomputer

Feb 8, 2024 — by Giorgio Mendoza 421 views

Olimex recently featured the CERBERUS 2100 which is a multi-processor microcomputer that integrates classic computing architectures with modern design principles, offering a comprehensive educational platform for electronics and computer engineering students.

The system features a trio of processors: the Z80 and W65C02S CPUs, known for their historical significance in computing, and an AVR I/O controller, providing a modern touch to input/output operations. These processors are configurable, with the Z80 and W65C02S CPUs operating between 4 or 8 MHz, while the AVR I/O controller operates at 16 MHz.

CERBERUS 2100 utilizes three custom ICs (CPLDs)—FAT-SCUNK, FAT-CAVIA, and FAT-SPACER—which are central to the system’s flexibility and programmability. These CPLDs enable in-system hardware reconfiguration, facilitating educational exploration and hardware experimentation.


CERBERUS2100 system architecture
(click image to enlarge)

The microcomputer includes 64 KB of user-addressable RAM, with a unique approach to system storage—eschewing ROM entirely. Instead, the BIOS is stored in the internal Flash memory of the FAT-CAT (Custom ATmega328pb) controller, conserving address space and streamlining system architecture.

An expansion slot paired with a generic I/O protocol supports Direct Memory Access (DMA), allowing for future growth and integration of additional hardware components. This feature underscores the system’s potential as a platform for advanced learning and development.

CERBERUS2100 board overview
(click image to enlarge)

For video output, CERBERUS 2100 offers standard VGA display capabilities with a resolution of 320×240 pixels, supporting up to 8 simultaneous colors and on-the-fly redefinable character bitmaps. This enables users to delve into the nuances of tile graphics and character-based display design.

CERBERUS2100 video circuit architecture
(click image to enlarge)

The system’s architecture is modular and entirely asynchronous, communicating via memory-mapped I/O. This design promotes an understanding of how different subsystems—video, computer proper, and expansion circuit—interact within a computing device.

CERBERUS2100 top view
(click image to enlarge)

The BIOS, written as an Arduino AVR sketch in C, is approachable and easily editable, reflecting the system’s open-source design. Users can engage with the system on a ‘bare metal’ level or through BASIC interpreters provided for both the Z80 and W65C02S CPUs.

For technical details, the CERBERUS 2100 hardware manual and schematics are available on the product page. Further information can be found in the TheByteAttic GitHub repository.

Further information

The CERBERUS2100 can be purchased for €219.00 through the Olimex web store.

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