SiFive revealed its RISC-V-based SiFive Intelligence X280 core IP with RVV extensions for AI/ML edge computing. Andes, meanwhile, unveiled its Linux-ready AndeSight IDE v5.0 with new RVP and RVV support.

SiFive and Andes Technology each unveiled some new RISC-V architecture products. SiFive fully revealed its Linux-focused, multi-core ready SiFive Intelligence X280 processor design and Andes Technology announced version 5.0 of its Linux-compatible AndeSight IDE for RISC-V development (see farther below).

 
SiFive Intelligence X280

Last week, SiFive announced that Renesas agreed to license the SiFive Intelligence IP for its automotive processors and that AI startup Tenstorrent would tap the upcoming SiFive Intelligence X280 model as a platform for its high-end, datacenter focused Tensix NPU. As promised, SiFive revealed the X280 design at the Linley Spring Processor Conference last Friday. SiFive has now posted a blog announcement and product page for the X280.

SiFive Intelligence X280 core (left) and SoC (reference) block diagrams
(click images to enlarge)

We had speculated that the SiFive Intelligence X280 might advance to SiFive’s next-gen, Cortex-A72-like U8-Series Core IP announced back in 2019. However, the X280 uses the same Cortex-A55 like U7 core architecture found on the FU740 that drives the HiFive Unmatched development board. U7 is also used on the first SiFive Intelligence IP announced last October: the VIU75. However, since last week’s report, SiFive has replaced its single-core VIU75 link with a SiFive Intelligence page that mentions only the multi-core X280. Presumably, the VIU75 is similar if not identical to the single-core variant of the X280.

SiFive Intelligence is not a neural processor in the traditional sense but features a “differentiated” software toolchain for developing “scalable solutions for AI and ML applications.” The technology “provides great AI inference performance and support for the full capability of TensorFlow Lite,” says SiFive.

The key to the AI enablement is the adoption of the soon to be RISC-V standard Vector (RVV) RV64GCV extension. SiFive calls its version SiFive Intelligence Extensions.

SiFive Intelligence can be used on its own for AI/ML processing or can be paired with an NPU, as in the Tenstorrent design. In some ways it is like the Advanced Vector Extensions (AVX) technology available on x86 processors or Arm’s NEON and Scalable Vector Extension (SVE). The difference is that it is more specifically tuned to AI. The idea is that by enabling software-driven vector processing, you won’t need to offload all the AI/ML chores to the NPU or GPU, thereby reducing bus transfer delays.

Meanwhile, the software-oriented approach makes it easier for software to communicate with hardware, which is a common hurdle for AI developers. This approach is also claimed to more flexible for meeting the needs of future AI application requirements.

“Hardwired accelerators may work well for matrix multiplication and convolution layers today but simply aren’t efficient or adaptable enough for more modern models, such as transformer-based models like BERT or recommendation models,” says the announcement. “What’s needed are adaptable AI and ML solutions with a flexible, future-proof approach enabled by efficient, programmable building blocks of hardware IP designed with a software-first ideology.”

SiFive Intelligence X280 features
(click images to enlarge)

Aside from the addition of the vector unit, the 64-bit X280 does not appear to be dramatically different than the similarly multi-core ready U74-MC core used on the FU740 (see feature list above). The main difference appears to be in the SoC reference design, which lacks the MCU-like S7 core of the FU740 (see image at right farther above). The vector extensions support BF16/FP16/FP32/FP64, int8 to 64 fixed-point data types.

An Intelligence X280 Development Kit is available with an RTL evaluation, test bench RTL, and FPGA bistream. It also includes an SDK and documentation.

 
AndesSight IDE v5.0

Andes Technology has gradually been improving its Eclipse-based AndesSight IDE for its RISC-V based MCUs and Linux-oriented application cores, including its most recent 32-bit A45MP and 64-bit AX45MP cores. On Friday, the company announced AndesSight IDE v5.0, which adds support for the RISC-V DSP/SIMD extension (RVP) and the same RVV vector extensions adopted by SiFive Intelligence.

The standard, Linux-ready A45, A27, and A25 cores lack vector support, but in 2019 Andes announced a vector processor called the NX27V, which launched last year and was updated with RVV 1.0 support in December. The NX27V is based on the A27, which we covered with the A45 cores. Aimed initially at the server market, the 32bit NX27V offers an RVV compliant vector processing unit (VPU).

AndeSight IDE (STD version) architecture (left) and NX27V block diagram
(click images to enlarge)

Although the AndeSight 5.0 announcement does not mention the NX27V, the IDE can presumably fully exploit the RVV extensions of the NX27V and future RVV-enabled versions of the A45 cores. RVV enables high-volume data computation on the edge or cloud for general AI, NN, and data processing applications, says Andes. The RVP capability, meanwhile, is said to enable “TinyML, AIoT, and signal processing applications on edge and endpoints.”

The v5.0 IDE supplies an Andes NN Library for accelerating Neural Network algorithms. Andes claims that Andes NN provides a 66x speedup of MobileNet-v1 with half-precision floating-point, 256-bit SIMD width, and 512-bit vector length over RISC-V baseline extension.

AndeSight IDE v5.0 also provides the AndesClarity visualization platform, which acts as a processor pipeline analyzer. Other AndesSight features include debugging and scripting features and an AndeSim near cycle simulator, among other tools.

AndeSight IDE v5.0 supports Linux 5.4 LTS, as well as RTOSes including FreeRTOS and Zephyr. The Andes Linux kernel has been verified with LTP (Linux Test Project) and can be “seamlessly booted with Fedora or Debian Linux distro on Andes development boards along with the device drivers,” says Andes. A smaller image for embedded Linux offers a RISC-V 32-bit Linux kernel to run on the 32-bit A25 and A27 cores.

 
Further information

The SiFive Intelligence X280 IP is now available for licensing, says SiFive. No pricing was available for the IP or the Intelligence X280 Development Kit. More information may be found in the X280 announcement and X280 product page and the SiFive Intelligence page.

AndeSight IDE v5.0 will be available for licensing after June 2021 at an undisclosed price. More information may be found on Andes Technology’s announcement and product page.