SiFive has launched a Cortex-A75 like, RISC-V RV64GC “Performance P550” core plus a lower-end “Performance P270” that adds RVV extensions. The P550 core is being deployed by Intel in a new RISC-V processor.

In Oct. 2019, leading RISC-V IP developer SiFive, Inc. announced a next-gen U8-Series platform for high-end Linux driven processors, starting with a U84 core. The company has now announced the availability of the first U84-based core IP: the SiFive Performance P550. The highly area-efficient core design delivers a SPECInt 2006 score of 8.65/GHz, “making it the highest performance RISC-V processor available today,” says SiFive.

SiFive Performance P550 block diagram (left) and typical multi-core SoC design
(click image to enlarge)

Intel is debuting the Performance P550 its first RISC-V processor, a 7nm chip code-named Horse Creek. There is also a Horse Creek development platform.

SiFive also announced a SiFive Performance P270 core, which is called a Performance chip despite its older U7-series foundation and its SiFive Intelligence like vector extensions. Both the Performance P550 and P270 support up to quad-core configurations and run Linux (see farther below).

 
Intel Horse Creek

At the time of this posting, Intel has yet to post any details regarding the Horse Creek platform. According to reporting we’ve seen, Intel is not sharing configuration details on Horse Creek at present.

“We are pleased to be a lead development partner with SiFive to showcase to mutual customers the impressive performance of their P550 on our 7nm Horse Creek platform,” stated Amber Huffman, Intel Fellow and CTO of IP engineering group at Intel. “By combining Intel’s leading edge interface IP such as DDR and PCIe with SiFive’s highest performance processor, Horse Creek will provide a valuable and expandable development vehicle for cutting-edge RISC-V applications.”

Earlier this month, Bloomberg reported quoted unnamed sources as saying that Intel had offered to acquire SiFive for more than $2 billion. In March, Intel announced that it would include SiFive’s RISC-V designs in a new Intel Foundry Services program for fabricating processors for startups.

SiFive, which was valued at about $500 million when it last raised funds in 2020, is also fielding acquisition and investment offers from other companies, said Bloomberg. The company’s value is likely to continue to soar if Nvidia’s $40 billion purchase of Arm from Softbank goes through, as Arm licensees are leery of licensing IP from the rival Nvidia.

Recently, the European Commission evaluating the acquisition indicated they would need more time to consider the Nvidia/Arm deal, thereby threatening to push the completion date past the Mar. 2022 deadline. The two companies can then optionally extend the deadline to Sep. 2022, at which either party can opt to back out of the deal if the US, Chinese, and European regulators fail to approve it.

 
SiFive Performance P550

Designed for “modern computing challenges from the data center to the edge,” the SiFive Performance P550 is a RISC-V RV64GC compatible design that features a thirteen-stage, triple-issue, out-of-order pipeline compatible with the RISC-V RV64GC ISA. Whereas the U84 was originally intended to approximate Arm’s Cortex-A72 — the core architecture used on the quad-core Raspberry Pi 4 — the Performance P550 is claimed to be roughly equivalent to the much faster Cortex-A75. In 2019, the U84 was said to support a clock rate of up to 2.6GHz.

“With the announcement and availability of the SiFive Performance P550, we are pleased to deliver the fastest RISC-V processor IP for a wide range of market applications,” stated Patrick Little, Chairman and CEO of SiFive. Coinciding the release of today’s news, SiFive posted this detailed blog from CEO Little.

The Performance P550 IP can be deployed on much smaller chips than is possible for high-end Cortex-A cores. The P550 is “area optimized” at 0.38mm squared so a quad-core block of P550 cores takes up approximately the same area as a single Cortex-A75 core, claims SiFive.

As previously revealed in the U84 announcement, the P550 supports SiFive’s mix+match heterogeneous multi-core technology, which offers a similar function to Arm’s Big.Little. No fab process was announced, but the U84 was said to support 7nm, which is what Intel is using for Horse Creek.

 
SiFive Performance P270

SiFive also announced a lower end SiFive Performance P270, which had been previously revealed as the SiFive Intelligence VIU75 (see our SiFive Intelligence X280 report for an explanation.) This single-core chip has now been redeployed in a multi-core ready design with the new name of SiFive Performance P270.

SiFive Performance P270 block diagram (left) and typical multi-core SoC design
(click image to enlarge)

We are unsure why this is called a Performance chip when it is built on the same U7-series foundation used on the FU740 system-on-chip. The FU740, which uses the Cortex-A55 like, U74-MC microarchitecture, powers SiFive’s HiFive Unmatched SBC.

Earlier this year, SiFive announced a U74-based SiFive Intelligence X280 core based on RISC-V’s new RV64GCV vector extensions for AI/ML edge computing. (In its original U8-series announcement, SiFive said the U84 would be followed by a U87 design that would support vector extensions, which do not appear to be available on the P550.)

The SiFive Performance P270 offers a 256-bit per cycle vector unit with SiFive Intelligence Extensions compared to a 512-bit per cycle vector unit on the X280. As a result AI and ML specific workloads run slower, but with lower power consumption. Like the P550 and X280, the P270 supports up to quad-core coherent multicore clusters with SiFive mix+match technology to create heterogeneous clusters.

The older U74 cores without the SiFive Intelligence capability are now referred to as Essential cores. This group also includes the earlier U5-series/U54 cores found on the FU540 SoC that powers the HiFive Unleashed SBC, as well as the MCU-oriented S- and E-series cores.

RISC-V adoption by chipmakers is growing quickly, although it still represents a small fraction of installs compared to Arm and X86. RISC-V is an open source specification and does not require a license to use. Most RISC-V developers share at least some of their code, which encourages reuse and reduces development time. RISC-V offers a permissive license that permits chipmakers such as SiFive to use RISC-V to create proprietary core and SoC designs. However, these tend to be licensed at a much lower rate than Arm cores.

 
Further information

The SiFive Performance P550 core IP is available now for evaluation. More information is available from SiFive’s press release and further information should eventually appear on the SiFive website. SiFive will hold a webinar on its product line on July 14. Registration is available here.