All News | Boards | Chips | Devices | Software | Archive | About | Contact | Subscribe
Follow LinuxGizmos:
Twitter Facebook Pinterest RSS feed
*   get email updates   *

RISC-V to hand out 1,000 free RISC-V dev boards

May 3, 2021 — by Eric Brown 3,780 views

RISC-V International announced it will give away 1,000 free RISC-V development boards through June 2022 with up to 16GB RAM.

RISC-V International has launched a board giveaway program to encourage adoption of the open source RISC-V architecture in the development community. The organization plans to hand out over 1,000 boards to academia and early adopters by June 2022.

HiFive Unmatched

To earn a chance at winning a board, participants need to sign up for a RISC-V membership, which is free for a community membership. Developers also need to specify their project plans for the board, as well as memory requirements, which range from 1GB to 16GB.


The giveaway program, which we saw on, is remarkable given that a year ago, it might have been difficult to acquire 1,000 RISC-V development boards, let alone be willing to give them away for free. On a separate page, RISC-V International lists a dozen RISC-V boards that are available for purchase. It is unclear which of these might be part of the giveaway program.

Given the 1GB to 16GB range, the program will almost certainly include Linux-driven boards. Only four tuxified models are listed on RISC-V’s official list, but more boards may join them over the coming months. The list includes SiFive’s FU740-based HiFive Unmatched, Microchip’s PolarFire SoC powered PolarFire SoC Icicle Kit, and the SiFive U74 based BeagleV from and Seeed, which also goes by the name of BeagleV – Starlight. Also included is Aries’ PolarFire SoC driven M100PFS compute module.

PolarFire SoC
Icicle Kit

Early last year, the Berkeley, Calif. based RISC-V Foundation transitioned to become RISC-V International, a Switzerland-based nonprofit business association. The move was made in part due to concerns over US trade regulations. The organization is aligned with the Linux Foundation’s CHIPS Alliance, which curates and develops open source code for RISC-V chip development.

A recent IEEE Spectrum report on the fast growth of RISC-V noted that adoption is growing fastest in Asia, especially in China and India. Some 37 percent of RISC-V members are from the Asia-Pacific region, with the remainder split between North America and Europe.

BeagleV – StarLight
(click image to enlarge)

Recent Linux-related RISC-V news includes Antmicro’s open source ARVSOM compute module, which is built around the same SiFive U74 based StarFive 71×0 SoC found on the BeagleV. The ARVSOM mimics the Raspberry Pi CM4 and is supported on Antmicro’s upcoming, cluster-focused Scalenode carrier board for the CM4. SiFive, meanwhile, recently revealed a U74-based SiFive Intelligence X280 core with AI support enabled via RISC-V RVV vector extensions.

Further information

Developers can apply for a free RISC-V board by signing up for a free membership and filling out this Google Docs form. More information may be found on the RISC-V International announcement.

(advertise here)

Print Friendly, PDF & Email

One response to “RISC-V to hand out 1,000 free RISC-V dev boards”

  1. Bruce Hoult says:

    The most important thing you’ve missed is the 1 GHz 64 bit single core Allwinner D1 SoC and boards based on it. Allwinner have their own EVB (EVal Board) and Sipeed and Pine64 have announced plans to sell Linux SBCs based on it for as low as $10 or $12. The chips are in mass-production now, boards will be available within a couple of months, and several organisations, including Sipeed, have offered ssh remote access to an EVB for those interested in testing things.

    The most interesting thing about this chip may be that it implements a draft version of the RISC-V Vector ISA. The draft 0.7.1 is assembly language and binary incompatible in several ways with the 1.0 spec that should be ratified this summer, but it’s close enough to provide valuable experience. Some simple functions, such as memcpy(), are binary compatible (though not assembly language compatible!) most code is fairly trivial to convert — the overall structure and principles are the same.

Please comment here...