D3’s “DesignCore RVP-TDA4Vx Dev Kit” runs Linux on TI’s new Jacinto 7 TDA4VM ADAS SoC with 2x Cortex-A72, 6x Cortex-R5F, 2x EVE/AI enabled DSPs, and a PowerVR GPU. TI also unveiled a Jacinto 7 DRA829V automotive gateway SoC plus its own Jacinto 7 dev kits.

D3 Engineering announced a sandwich-style development kit that showcases one of TI’s two new Jacinto 7 automotive system-on-chips: the TDA4VM. The Linux-driven DesignCore RVP-TDA4Vx Development Kit, which features 8x 4Gbps FPD-LinkT III channels and 4x display channels, follows its earlier Jacinto 6-based DesignCore RVP-TDA2x Development Kit for ADAS.

DesignCore RVP-TDA4Vx Dev Kit
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Both the D3 dev kit and the TDA4VM SoC were announced last week at CES along with another Jacinto 7 SoC that shares the same Linux-based SDK: the DRA829V gateway processor. While the TDA4VM targets ADAS assisted driving applications and entry-level autonomous vehicles, the DRA829V is a stripped-down, headless version of the TDA4VM designed as a gateway hub processor for any sensor-rich, high-tech vehicle. The DRA829V can also function as companion computer to an ADAS or autonomous driving computer such as the TDA4VM.

The Jacinto 7 SoCs are designed to “quickly and efficiently manage multilevel processing in real time, all while operating within the system’s power budget,” says TI. The SoCs operate at 5W to 20W, eliminating the need for active cooling. The Jacinto 7 SoCs share common SDKs: the Processor SDK Linux Automotive (PSDKLA) and Processor SDK RTOS Automotive (PSDKRA).

The 16nm-fabricated TDA4VM and the DRA829V appear to fall slightly above and below, respectively, the capabilities of NXP’s recently announced S32G gateway SoC, which shares features with both SoCs. Like the S32G, the TDA4VM handles basic ADAS and offers an AI chip and DSPs. Like the DRA829V, the TDA4VM provides an 8-port GbE/TSN switch, compared to a 2-port switch on the S32G. However, the S32G has far more networking accelerators, among many other architectural and I/O differences that defy easy comparison.

The TDA4VM and S32G compete with established ADAS solutions like Intel’s Mobileye EyeQ5, which runs Linux on an octa-core Atom C3000 along with a Mobileye deep learning accelerator. Other competition includes Nvidia’s similarly Linux-powered, Jetson AGX Xavier based Drive PX systems. Nvidia recently announced a more advanced Drive AGX Orin platform for autonomous cars based on an Orin SoC.

Like the all these SoCs, the new Jacinto 7 models offer ASIL-D functional safety support compliant with ISO 26262. The Jacinto 7 and S32G accomplish ASIL-D in part due to isolated MCUs that can operate in lockstep mode: 2x of the 6x Cortex-R5F cores on the Jacinto 7 and the 3x Cortex-M7 cores on the S32G.

We’ll start with TI’s TDA4VM and DRA829V SoCs before detailing the D3 dev kit below. We’ll also briefly cover TI’s own dev kits for the SoCs, each of which starts at $1,900.

 
Jacinto 7 TDA4VM

The TDA4VM provides sensor pre-processing of camera, radar, LIDAR, ultrasonic, and other sensors, as well as on-chip near-field analytics for ADAS to provide 360 degrees of awareness. The TDA4VM supports 8-megapixel (8MP) front-facing cameras, which can see farther than the cameras supported by the Jacinto 6 and operate better in the fog. The SoC can simultaneously control four to six 3MP cameras.

Jacinto 7 TDA4VM (left) and DRA829V block diagrams
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Applications include automated valet park, deep learning, neural networks, video analytics, object identification and tracking, collision avoidance, driver notification, multi-camera display, mirror replacement, driver and cabin monitoring, sensor fusion, IVI, and telematics.

By comparison, the Jacinto 6 models are primarily aimed at IVI and cluster control graphics with limited “informational” ADAS capabilities. The Jacinto 6 has 2x Cortex-A15, 4x Cortex-M4, a PowerVR SGX544, and one or two DSPs.

The TDA4VM SoC combines 2x up to 1.8GHz Cortex -A72 and 6x up to 1GHz Cortex-R5F cores. For graphics you get Imagination’s 3D, 750MHz PowerVR Rogue 8XE GE8430 with 100 GFLOPS performance.

TI says that there will be additional Jacinto 7 models in the future. Elsewhere, it notes the presence of 1MB shared L2 cache per dual-core Cortex-A72 cluster and says the SoC can support up to 4x Cortex-M4F subsystems. This suggests that more powerful Jacinto 7 models are in the works.

The TDA4VM is further equipped with a 1GHz C7x DSP with floating point vector and scalar cores. The DSP integrates an 8-TOPS “deep-learning” Matrix Multiply Accelerator (MMA) with dedicated deep learning and traditional algorithm accelerators. The MMA is based on TI’s embedded-vision-engine (EVE) neural processing cores. EVE cores are integrated in the TI Sitara AM5729 SoC found on the BeagleBone AI SBC.

In addition to this super DSP, the SoC includes a pair of TI’s lower-powered C66x DSPs, as well as an ISP and vision and vision assist accelerators. Depth and motion processing accelerators are also available.

Two of the 6x Cortex-R5F cores are separated from the rest of the SoC on an isolated “MCU Island” and offer optional lockstep for safety purposes. The MCU Island includes its own RAM, timers, navigator subsystem, and other interfaces.

The TDA4VM is further equipped with a navigation subsystem, a PMIC, and 8MB of on-chip L3 RAM with support for external LPDDR RAM. There’s also a security subsystem with secure boot, root key, and crypto acceleration.

The SoC provides a PCIe Gen3 switch on-chip that supports 4x 2-lane PCIe interfaces. The 8-port Ethernet switch supports 2.5Gbps Ethernet in addition to GbE and provides Time-Sensitive Networking (TSN) support.

The extensive peripheral support includes up to 16x MCAN interfaces with CAN-FD, 2x USB 3.0, and 3x 4-lane MIPI-CSI. There are multiple eDP, DP, and DSI display connections with HD or Ultra-HD video (3840 × 2160 @ 60fps), and 12x multi-channel audio serial ports.

 
Jacinto 7 DRA829V

The DRA829V gateway processor offers dual -A72 and 6x Cortex-R5F cores just like those on the TDA4VM. It similarly features an MCU Island cores with optional lockstep. Security, Ethernet, PCIe, and I/O details also appear to be identical.

Because it’s intended as a gateway networking processor rather than an ADAS computer, the Jacinto 7 DRA829V lacks the PowerVR GPU and EVE-enabled DSPs of the TDA4VM. There’s no VPU, ISP, or other accelerators. In addition, there’s only 2MB of on-chip L3 RAM. As far as we can see, this is a stripped-down version of the TDA4VM without any new features.

A Jacinto 7 analysis in EETimes says that TI is promoting the DRA829V as a low-cost solution for adding secure over-the-air (OTA) updates to cars.

 
DesignCore RVP-TDA4Vx Development Kit

D3 Engineering, a Texas Instruments platinum design partner, is not only an automotive technology developer, but creates automation and embedded vision systems such as the DesignCore Camera Mezzanine Board OV5640 found on Arrow’s DragonBoard 410c Camera Kit. As noted, D3’s DesignCore RVP-TDA4Vx Development Kit is the successor to the Jacinto 6-based DesignCore RVP-TDA2x Development Kit for ADAS.

DesignCore RVP-TDA4Vx external and internal views
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The RVP in the RVP-TDA4Vx name stands for “Rugged Vision Platform.” Indeed, the rugged, enclosed kit is not only useful for lab evaluations but for deploying in real-world test rigs and vehicles. The IP64-protected system is on a “path” toward IP67, and is intended, but not yet tested, for -40 to 85°C operation. There’s a 9-40V automotive supply with reverse battery protection.

The kit combines a baseboard with a TDA4VM SOM that integrates the TI’s Jacinto 7 TDA4VM SoC with lockstep MCU Island cores. The compute module also provides 4GB ECC LPDDR4, 16GB eMMC, 32GB UFS, and 64MB each of HyperFlash and OSPI flash.

The DesignCore RVP-TDA4Vx Development Kit baseboard features a configurable SerDes interface implemented via a personality card. It provides up to 8x high speed SerDes data streams with serial back channel data and storage to local memory. Dual GbE ports are available for the CPU and MPU Island, respectively.

Dual 4-lane MIPI-CSI2 channels support up to 2.5Gbps/lane, including support for 8-channel FPD Link III, 8-channel FPD Link IV, 8-channel GMSL-2, or 2-channel RAW MIPI-CSI2. There’s also a 4-lane MIPI-CSI2 for video output, as well as a mini-DisplayPort for up to 3x 1080p displays via MST. Displays are also available via a single FPD Link III interface, which can alternately be used for Hardware In the Loop (HIL) data.

The DesignCore RVP-TDA4Vx is further equipped with a USB 3.1 Type-C port, which can be used for LIDAR along with the GbE ports. Other features include 4x USB 2.0, RS232, and other serial interfaces that support ultrasonic sensor input.

Six CAN-FD ports, including 2x with wake function, support radar units along with the GbE ports. You also get a microSD slot, an internal M.2 M-key slot with optional SSD, and an external PCIe connector that supports HyperLink. DIO, debug, accelerometer, and a GPIO expansion interface are also available. In addition to the Linux and RTOSD SDKs, D3 offers its own vision software framework for development.

DesignCore RVP-TDA4Vx YouTube promo

 
TDA4VMx and DRA829Vx evaluation modules and CP carrier

TI offers its own $1,900 development kits for the Jacinto 7 SoCs built around TDA4VMx and DRA829Vx evaluation modules (EVMs). Both the TDA4VMx EVM and DRA829Vx EVM modules combine their respective SoCs with 4GB LPDDR4 with ECC, 256MB HyperRAM, 512MB HyperFlash, 512MB NOR flash, and Octal-SPI NOR flash. A PMIC is also available.

TDA4VMx EVM (left) and DRA829Vx EVM
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The modules are extended with a Common Processor (CP) carrier, also referred to as a J721E EVM. The board provides 32GB UFS and a microSD slot with a 16GB card loaded with TI’s Linux and RTOS SDKs.

The CP board provides GbE, USB 3.1 Type-C, and 2x USB 2.0 host ports, with two more USB 2.0 headers. There’s are also a pair of 4K DisplayPorts with MST support, 4x CAN interfaces, 6x serial links, an FPD-Link Panel Interface, and multiple audio I/O jacks. Dual mini-PCIe slots and an M.2 M-key socket are also available.

Common Processor (CP) carrier with TDA4VMx EVM and optional Ethernet module (left) and detail view of carrier board on its own
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In addition to I3C, ADC, JTAG, and other features, the board provides a variety of expansion connectors for various optional add-on daughter cards. These include MLB/MLBP, image/video capture, Apple Authentication Module, GPIO, and an Ethernet module with 5x GbE (4x RJ45 ports), RGMII/DP83867, and QSGMII/VSC8514 support.

 
Further information

The DesignCore RVP-TDA4Vx Development Kit with TI’s Jacinto 7 TDA4VM SoC will be available in 1Q 2020 for an undisclosed price. More information may be found in D3 Engineering’s announcement and RVP-TDA4Vx datasheet (PDF).

Texas Instruments’ Jacinto 7 TDA4VM and DRA8329V processors are available now for $97 in 1,000-unit quantities. Volume production is expected in 2Q 2020. More information may be found in TI’s Jacinto 7 announcement, as well as its TDA4VM and DRA8329V product pages.

TI’s TDA4VMx and DRA829Vx EVMs with carrier board are available now starting at $1,900 apiece with optional extension boards. More information may be found on the TDA4VMx EVM and DRA829Vx EVM product pages.