All News | Boards | Chips | Devices | Software | LinuxDevices.com Archive | About | Contact | Subscribe
Follow LinuxGizmos:
Twitter Facebook Pinterest RSS feed
*   get email updates   *

Compute module taps NXP’s new octa-core S32G3 CPU

Feb 24, 2022 — by Eric Brown 494 views

MicroSys announced a “Miriac MPX-S32G399A” module featuring NXP’s new S32G3 in-vehicle and industrial networking CPU, which runs Linux on up to 8x Cortex-A53 cores with up to 4x lockstep Cortex-M7 cores and 20MB system RAM.

MicroSys Electronics teased an upcoming Miriac MPX-S32G399A compute module that will debut NXP’s S32G3 Series S32G399A SoC. We missed the Dec. 21 announcement of the up to octa-core, Cortex-A53 S32G3 Series. This 2nd Gen S32G SoC delivers 2.5 times more applications processing performance than the S32G2 Series, claims NXP.

Like the up to quad-core S32G2, which was announced in Jan. 2020 and shipped in Q2 of last year, the pin-compatible S32G23 is designed for Linux-driven, safety critical and software designed networking systems. The SoC primarily targets automotive applications, but also supports industrial systems (see farther below).



NXP conceptual diagram for earlier S32G (left) and earlier, S32G2 based MicroSys Miriac MPX-S32G274A
(click images to enlarge)

MicroSys had few details on its Miriac MPX-S32G399A module, which will begin sampling later this year, along with a carrier board, cable set, and cooling solution. Production availability is scheduled for Q1 2023.

— ADVERTISEMENT —


The module will offer the octa-core S32G399A, the first of a series of planned S32G3 processors. The module offers multiple native CAN interfaces and “comprehensive” FlexRay, LIN, and Ethernet support, says MicroSys.

Primary applications include real-time connected, ASIL D compliant OEM and Tier-1 automotive systems, as well as mobile machinery and automotive test and measurement equipment. Further applications include data loggers, edge gateways, and fail-safe programmable logic controllers (PLCs).

MicroSys will “extend its application areas to SIL certifications for any market where functional safety standards analogous to IEC 61508 are required, including railway technology (EN 50155), aviation (DO-160), stationary and mobile machinery (ISO 13849), as well as manufacturing robots (ISO 10218), control systems (IEC 62061), and drive systems (IEC 61800‑5‑2),” says the company. “Approvals in the aviation context (DO-254/DO-160) can be supported with manufacturer documentation.”

The Miriac MPX-S32G399A follows the SODIMM-style, S32V234-based Miriac MPX-S32G274A. The module uses the initial, quad-core S32G274A part and was announced in Mar. 2020 along with a Miriac SBC-S32G274A dev kit.



MicroSys Miriac AIP-S32G274A (left) and GoldBox 2 system with S32G2
(click images to enlarge)

In December, NXP announced that Hailo’s Hailo-8 NPU module would be available on many NXP S32G2 and NXP LX1062 based systems. These include its own dev kits and Goldbox embedded computers, as well as a newer variant of the Miriac SBC-S32G274A dev kit called the Miriac AIP-S32G274A (see image above, at left). In addition to offering the Hailo-8 option, the AIP board adds 6x SPS inputs (24V) and 6x SPS outputs and boosts the eMMC to 32GB and the QuadSPI flash to 512MB.

 
NXP S32G3

Like the S32G2, the S32G3 is billed as a gateway processor, in that it acts as a smart hub for automotive or industrial components controlled by its own Cortex-M7 chips as well as other S32-family MCUs. The device can similarly act as a network hub companion to a separate driverless car computer. The S32G is particularly well suited for what NXP sees as a new wave of service-oriented “domain vehicle” architectures, in which the SoC could act both as the gateway and as a separate ADAS safety controller.



NXP S32G3 (left) and S32G2 block diagrams
(click images to enlarge)

Whereas the S32G2 is available with up to 4x -A53 cores and 3x -M7 cores, as in the S32G274A, the S32G3 supports 4x or 8x -A53 and up to 4x -M7 cores, as in the octa-core S32G399A. As before, the Cortex-M7 cores operate in dual-core lockstep (DCLS) complexes for real-time applications. The greater number of cores enable a doubling of the number of isolation domains to 16 along with a 2.5x performance boost, claims NXP.

Each of the quad-core Cortex-A53 blocks can optionally be configured to perform in lockstep. System RAM has advanced from 8MB to 20MB, and although I/O appears to be the same, there are more watchdog, system, and flex timers.

Both members of the S32G family offer ASIL D functional safety support compliant with the D level of Automotive Safety Integrity Level (ASIL) specified under ISO 26262. The headless processors offer a variety of network accelerators, security features, and a Packet Forwarding Engine, as well as a Low Latency Communication Engine (LLCE) for automotive networks acceleration. (For more details, see our original S32G2 report.)

NXP is preparing an S32G-PROCEVB3-S compute module, as well as an S32G-VNP-EVB3 evaluation board, an S32G-VNP-RDB3 reference design board, and an S32G-VNP-GLDBOX3 (GoldBox 3) embedded system. The products will ship with a Linux BSP, S32 Design Studio IDE, Real Time Drivers (RTD) including AUTOSAR MCAL, and much more, as seen in the product brief linked to below. Clues as to the nature of the dev kits and GoldBox platforms can be seen in similar NXP platforms developed for the S32G, as described in our earlier report on NXP’s collaboration with Hailo.

 
Further information

The Miriac MPX-S32G399A module will begin sampling later this year along with a carrier board, cable set, and cooling solution. Production availability is scheduled for Q1 2023. More information may be found in MicroSys’ announcement and preliminary product page. You can sign up for a webinar here.

NXP’s initial S32G399A processor began sampling to lead customers in December, and a production launch is targeted for Q1 2023. More information may be found in NXP’s S32G3 announcement, as well as the S32G3 product page and product brief (PDF).

(advertise here)


Print Friendly, PDF & Email
PLEASE COMMENT BELOW

Please comment here...