EdgeQ is prepping an AI-enabled 5G “basestation on a chip” built on RISC-V cores and OpenRAN standards that claims to greatly reduce power, cost, and complexity for 5G basestations.

Santa Clara based 5G chip startup EdgeV announced a highly integrated and programmable 5G modem processor based on a RISC-V reference design. The EdgeV system-on-chip is compliant with OpenRAN (or “O-RAN”) standards for open, interoperable Radio Access Network (RAN) solutions using software defined cores.

EdgeV also announced that former Qualcomm CEO Paul Jacobs and CTO Matt Grob have joined its advisory board. In November, EdgeQ revealed that it had secured $51 million in funding.

5G basestation functions integrated in EdgeQ 5G modem SoC
(click image to enlarge)

Due to begin sampling by the second quarter, the unnamed 5G modem processor will integrate multiple basestation functions that typically require multiple computers and processors. Integrated functions on this “5G basestation on a chip” include machine-learning acceleration, timer sync, FEC acceleration, front and midhaul transport, and “fully programmable” L1 processing.

EdgeQ 5G

EdgeQ claims its highly integrated design reduces overall 5G basestation power consumption from the 100W consumed by a typical proprietary, Intel Xeon-based solution, to 10W. The design is claimed to reduce basestation total cost of ownership (TCO) by up to 50 percent.

The 5G modem chip was announced via a series of interview articles with CEO Vinay Ravuri and other EdgeQ execs. EdgeQ’s pitch is that it offers a compromise between proprietary basestation technologies and typical OpenRAN based 5G basestation solutions. Proprietary solutions from companies like Huawei and Ericsson tend to be expensive and inflexible, with vendor lock-in, says EdgeQ.

OpenRAN-based solutions with components from different vendors offer more flexibility and programmer access, with more functions running in software than hardware, typically under a Linux OS, explains ArsTechnica. However, O-RAN projects are often more expensive and power-hungry, and require more technical expertise, says the story. TechCrunch quotes Ravuri as saying O-RAN tends to provide a “clunky solution” with higher power consumption.

EdgeQ, which is compatible with OpenRAN option 7.x and option 6, promises to offer greater flexibility and openness without the power consumption, expense, and complexity of typical O-RAN projects. Many of these goals are achieved by integrating more functions on a single processor.

EdgeQ 5G modem SoC architecture (left) and conceptual implementation within basestation
(click images to enlarge)
(Source: EdgeV via ArsTechnica)

The reduced cost and flexibility is enabled in part by using the open RISC-V architecture. Ravuri told TechCrunch that EdgeQ was able to optimize performance by adding custom instructions and about 50 to 100 of its own vector extensions to the base RISC-V Vector Extensions. The extensions “accelerate the computationally expensive vector math operations necessary to handle 4G and 5G communication and signal processing,” says ArsTechnica.

EdgeV touts the strength of its fast, power efficient machine learning (ML) component. “Since the vector math instructions needed for 5G signal processing and communication are largely the same needed for machine-learning tasks, excess processing capacity in EdgeQ’s CPU can be allocated to local ML processing,” says ArsTechnica. The RISC-V cores can offload processing to ML duty when idle, and the cores can even be partitioned between 4G/5G and ML workloads that can be distributed on a QoS managed basis.

CRN quotes EdgeQ VP Adil Kidwai as saying “The data transfer between 5G and AI is very fast, and for the edge applications where you have very low latency, where data needs to be processed and [transferred] to a command center within a matter of milliseconds, we are perfectly suited for those applications.” Kidwai also notes that the core EdgeQ technology “can be scaled from radio units and distributed units in base stations to access points and IoT devices.”

EdgeV provides full C/C++ access to the RISC-V SoC, making it more programmable than most basestaton solutions. The easier and more extensive AI integration should help enable new 5G applications in factory automation and robotics, says SDXCentral.

We saw no mention of OS support but given the high-end RISC-V and OpenRAN pedigree, we would be surprised if the EdgeV SoC did not run Linux. The newly posted EdgeQ website also notes projects including healthcare, digital twins, autonomous driving and traffic management, and collaborative robotics automated guided vehicles. It is unclear to what extent these are based on the same RISC-V technology used by the 5G modem SoC.

 
Further information

EdgeQ’s 5G modem SoC should begin sampling by 2Q 2021 with full production in 2022. More information may be found on the EdgeQ website.