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Firms partner to integrate NASA cFS on space-ready cPCI SBC

Apr 11, 2019 — by Jeff Child — 552 views

Aitech and EFSI have teamed up to integrate NASA’s cFs (core Flight System) using Aitech’s latest space-ready CompactPCI SBC called the SP0-S, and EFSI’s Linux distribution.

Aitech and Embedded Flight Systems (EFSI) have announced a partnership to integrate NASA’s cFS (core Flight System) into Aitech’s modular SP0-S space CompactPCI (cPCI) SBC. The effort makes use of Aitech’s SBC and optimized SP0-S drivers along with EFSI’s Linux distribution. Together, those enable the real-time performance required in space-based systems by providing real-time processor performance, low process-dispatch latencies, minimal process run-time jitter and complete partition independence, says Aitech.

The newly updated space-rated SP0-S from Aitech sports an NXP (formally Freescale) 1GHz PowerQUICC III 1 MPC8548E–e500 SoC. This 3U CompactPCI SBC is an upgrade from the company’s previous generation of Space COTS SP0 SBC. The enhancements include an SDRAM memory upgrade to DDR2 with 20% higher bandwidth at lower power dissipation. The SP0-S also adds three, rad-hard, on-board temperature sensors and 6x microcontroller-based A/D converters (ADCs). The sensor and ADCs monitor the board’s 3.3VDC input voltage as well as five internally generated CPU core and I/O voltages. The SBC is available configured for LEO (low earth orbit), MEO (medium earth orbit), and GEO (geostationary equatorial orbit) mission options.



SP0-S space-ready CompactPCI SBC
(click image to enlarge)

The board provides 1GB of ECC-protected DDR2 SDRAM, 1GB of user flash, and redundant 512k EEPROM boot memory. Onboard I/O capabilities of the SP0-S include 2x Gbit Ethernet ports, 3x UARTs, and up to 5x general-purpose discrete I/O channels. Also provided are 3x watchdog timers, a 1PPS port for timing synch, 3x on-board temperature sensors and 6x on-board A/D voltage monitors. The SP0-S is equipped with an industry standard conduction-cooled PMC mezzanine slot allowing for installation of additional modules and functionality.



SP0-S block diagram
(click image to enlarge)

The SP0-S can be factory configured to perform either as the CompactPCI system controller or as a peripheral board. When configured as system controller, the SP0-S can support up to seven additional cards on the CompactPCI backplane providing clock, arbitration and interrupt servicing capabilities.

The SP0-S SBC features a radiation tolerant design with mitigation and/or immunity to SEE, TID, and Latch-up. It was radiation tested in UC Davis and IUCF to 100 krads (Si) TID. The Wind River VxWorks BSP offers mitigation of single event upsets (SEUs). The NXP MPC8548E processor is manufactured using 90nm SOI technology and is immune to latch-up. Other components in the board’s standard configuration are latch-up immune to at least 65 MeV-cm2/mg for the SP0–S. Aitech says it can provide detailed data on total dose and latch-up immunity and related ordering options.

The cFS Framework

NASA’s cFS is made up of a reusable software framework and a set of reusable software applications that are platform- and project-independent. The cFS architecture combines three key aspects—a dynamic run-time environment, layered software and a component-based design. This combination is aimed at making the cFS suitable for reuse on any number of NASA flight projects and embedded software systems, resulting in a significant cost savings. The flight software framework takes advantage of a rich heritage of successful Goddard Space Flight Center flight software efforts. It was developed to address the challenges of rapidly increasing software development costs and schedules due to the constant changes and advancements in flight hardware.



cFS’s wide mission use
(click image to enlarge)

Charlie Rogers, vice president of EFSI, further stated that “cFS incorporates lessons learned and mission operation experience from years of NASA missions. As a reusable layered open-source flight software application, it’s being used by NASA, and many spacecraft vendors, for several upcoming missions. Mission classes that will use cFS range from manned flights to small CubeSat missions.”

Real-Time Linux

Aitech’s SP0-S space processor has been demonstrated to NASA running Linux 4.14 with Xenomai 3.0.6 to provide hard real-time, hard deadline guarantees. The demo was created by EFSI for NASA Johnson Space Flight Center, where NASA’s cFS was compiled to run on Xenomai 3’s hard real-time Cobalt POSIX implementation. Using Xenomai’s temporal partitioning scheduler, multiple instances of cFS were run and communicated across the partition boundary with SBM (software bus networking), a JSC (Johnson Space Center) product that expands the cFS software bus to other cFS runtime instances. Using this environment, multiple cFS instances run completely independent of each other.

The temporal partitioning and cFS combination are used to safeguard a critical application and a noncritical application, such as GN&C (Guidance, navigation, and control) application or an instrument application. It could also be used in a voting scheme to increase overall radiation tolerance of a spacecraft system.

NASA’s open source cFS was demonstrated by EFSI at Aitech’s booth this week at the 35th National Space Symposium in Colorado Springs, CO.

 
Further information

More information can be found on Aitech’s announcement and SP0-S product pages. Informaton on EFSI’s Core Flight System Open Sat Kit is available from EFSI. Additional information on cFS is provided on the NASA cFS webpage.

 

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