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Low cost Cortex-A9 SBC offers GbE and up to 28K FPGA logic cells

Jul 19, 2017 — by Rick Lehrbaum — 1,808 views
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MYIR’s 91 x 63mm, $69 “Z-turn Lite” SBC runs Linux on a Xilinx Zynq-7000 SoC, with up to 28K FPGA logic cells and single or dual Cortex-A9 CPU cores.

The Z-turn Lite board joins a growing number of SBCs and COMs built around the popular Xilinx Zynq-7000 ARM/FPGA SoC family. These include MYIR’s Z-turn board and MYC-CZ010/20 and MYD-CZ010/20 COM and carrier board, Avnet’s Zedboard and Microzed, the Red Pitaya, and the Parallela, among many others.



Z-turn Lite
(click image to enlarge)


Z-turn Board

MYIR is positioning the Z-turn Lite as a lower-end version of its original Z-turn Board, which was introduced back in 2015. In addition to its lower price and cost-effective Zynq-7000S SoC, the Lite shrinks from the original’s 102 x 63mm dimensions to a svelte 91 x 63mm, reduces the number of programmable I/O lines, and omits features such as the earlier SBC’s HDMI video port and temperature and motion sensors.



Z-turn Lite front view (left), and rear view showing 120-pin programmable I/O connector
(click images to enlarge)

The Z-turn Lite is offered with a choice of two Cortex-A9 based Zynq-7000 series SoCs: the single-core Zynq-7007S, with 23K FPGA logic cells; or the dual-core Zynq-7010 with 28K FPGA logic cells. Although Xilinx specifies these two Zynq-7000 parts as supporting maximum clock rates of 766MHz and 866MHz respectively, MYIR appears to be clocking the SoCs at 667MHz on the Z-turn Lite (although MYIR’s documentation confusingly shows all three speeds in various locations).


Z-turn Lite block diagram
(click image to enlarge)

The Z-turn Lite provides 512MB of RAM, along with 4GB of eMMC and 16MB of QSPI on-board flash. There’s also a TF card socket for storage expansion. Its I/O includes a Gigabit Ethernet port, a micro-USB 2.0 OTG port, and headers for JTAG and debug-UART connections. The flip-side of the board (shown farther above) has a 5mm-pitch 120-pin socket where you can gain access to 84 programmable I/O signals controlled by the Zynq SoC’s integrated FPGA.


Z-turn Lite details
(click image to enlarge)

MYIR supports the Z-turn Lite SBC with a Linux 3.15.0 SDK, and the board’s schematics are available for free download from the company’s website.


Xilinx Zynq-7000 single-core (left) and dual-core block diagrams
(click images to enlarge)

Specifications listed for the Z-turn Lite include:

  • Processor — choice of Xilinx Zynq-7000 ARM/FPGA SoCs:
    • Zynq-7007S — 1x Cortex-A9 core @ 766MHz; 23K FPGA logic cells
    • Zynq-7010 — 2x Cortex-A9 cores @ 866MHz; 28K FPGA logic cells
  • Memory:
    • 512MB DDR3 SDRAM
    • 4GB eMMC flash
    • 16MB QSPI flash
    • TF (SD) slot
  • Networking — 10/100/1000 Ethernet port
  • Other I/O:
    • Micro-USB 2.0 OTG port
    • UART debug port (header)
    • JTAG interface (header)
  • FPGA I/O — 120-pin (0.5mm pitch) socket with 84x programmable I/O lines (on rear of board)
  • Other features — watchdog; 2x pushbuttons; 5x LEDs; boot and power configuration headers
  • Dimensions — 91 x 63mm
  • Power — 5VDC @ 2A; 8W consumption (typ.)
  • Operating temperature — 0 to 70°C
  • Operating system — Linux 3.15.0

 
Further details

MYIR expects to begin shipping the Z-turn Lite SBC in August. The board is priced at $69 for model with the single-core Xilinx Zynq-7007S SoC, and $75 with the dual-core Zynq-7010. Additional details are available at MYIR’s Z-turn Lite product page.
 

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PLEASE COMMENT BELOW

One response to “Low cost Cortex-A9 SBC offers GbE and up to 28K FPGA logic cells”

  1. Alan M. says:

    Personally, I’d rather pay a little more and get the Terasic DE0-Nano-SoC Kit/Atlas-SoC or DE10-Nano with an Intel Cyclone V SoC. Dual core Cortex-A9 and more FPGA resources.

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