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Posts relating to Chips...


Intel roadmap shows 2Q rollout for 10nm Ice Lake and 3-5W Lakefield chips

Apr 26, 2019

After Intel rolled out 26 new 9th Gen Core models, a leaked Intel roadmap revealed a 2Q launch for its 10nm Ice Lake chips and a low-power Lakefield processor that combines an Ice Lake core with 4x Atom Tremont cores.
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Development kit showcases Cortex-A76 based Snapdragon 855

Apr 24, 2019

Intrinsyc has launched a 96Boards CE form-factor “Snapdragon 855 Mobile HDK” that runs Android 9 on a 7nm, octa-core Snapdragon 855 with GNSS, WiFi/BT, and optional touchscreens and cameras.
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Fanless mini-tower runs Linux Mint on up to 5GHz octa-core i9-9900K

Apr 23, 2019

Compulab’s passively cooled, Linux-friendly “Airtop3” mini-tower builds on a 9th Gen, octa-core Intel Core i9-9900K with Quadro RTX 4000 graphics plus up to 128GB DDR4, NVMe and SATA storage, triple displays, 2x GbE, 6x USB 3.1, and -40 to 70°C support.
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AI chip design combines up to six Linux-driven MIPS Open cores with TensorFlow engine

Apr 17, 2019

Wave Computing’s “TritonAI 64” IP for edge inferencing enables SoCs with up to 6x open-ISA MIPS-64 cores (with SIMD) running Google TensorFlow on a Debian stack plus WaveTensor and WaveFlow technologies for up to 8 TOPS/watt neural processing.
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Ryzen R1000 SoC offers dual Zen and triple Vega cores with a 12-25W TDP

Apr 16, 2019

AMD unveiled a lower-powered version of the Ryzen Embedded V1000 SoC called the Ryzen Embedded R1000 with dual quad-threaded cores, 12-25W TDPs, triple 4K displays, and support for dual 10GbE ports.
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First open source MIPS code is released

Apr 5, 2019

Wave Computing has released its first open source MIPS ISA without license fees or royalties. The MIPS Open release includes the latest R6 version of the MIPS 32-and-64-bit ISA plus an IDE for embedded Linux and RTOSes and support for the free MIPSfpga core.
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CHIPS Alliance to curate building blocks for RISC-V chips

Mar 13, 2019

Esperanto, Google, SiFive, and Western Digital announced an LF-hosted “CHIPS Alliance” to curate and develop open source code for RISC-V chip development, including WD’s donated SweRV core. Meanwhile, Intel is open sourcing its PCIe-based CXL interconnect.
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Multi-core, Linux-ready RISC-V cores feature DSP

Mar 13, 2019

Andes unveiled new A25MP and AX25MP versions of its Linux-friendly A25 CPU cores claimed to be the first RISC-V cores with a “comprehensive” DSP. The 1GHz-plus cores provide cache coherency and support for SMP and up to quad-core designs.
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AMD’s Epyc 3000 shows up on COM Express Type 7

Mar 8, 2019

Congatec announced a “Conga-B7E3” COM Express Type 7 module that runs Linux or Windows on AMD’s up to 16-core Epyc Embedded 3000 with up to 96GB DDR4, 4x 10GbE networking, 32x PCIe lanes, and an optional 1TB NVMe disk.
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NXP launches quad -A53 i.MX8M Nano SoC with 600MHz Cortex-M7 MCU

Feb 27, 2019

NXP unveiled a Linux-friendly i.MX8M Nano SoC with the same up to 4x 14nm Cortex-A53 cores as the faster, pin-compatible i.MX8M Mini, but with no VPU and a 600MHz Cortex-M7 instead of an -M4.
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ST’s new Cortex-A7 SoC to get the SiP treatment

Feb 25, 2019

Octavo unveiled an “OSD32MP1” System-in-Package (SiP) version of ST’s new dual -A7 STM32MP1 SoC. It matches the SoC’s 18 x 18mm footprint while adding 1GB DDR3, a PMIC, EEPROM, oscillators, and passives.
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Renesas unveils 64-bit Arm SoCs with 96Boards dev boards

Feb 22, 2019

Renesas unveiled an “RZ-G2” family of up to octa-core Cortex-A53 and -A57 SoCs with an updated RZ/G Linux Platform with the 64-bit Arm CIP SLTS kernel for 10 year+ availability. There are also two 96Boards dev boards.
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ST announces Cortex-A7/M4 hybrid SoC and OpenSTLinux distro

Feb 21, 2019

[Updated: Feb. 23] — ST unveiled a Linux-driven “STM32MP1” SoC with dual Cortex-A7 cores and a Cortex-M4 core. The SoC will be available in April with several Raspberry Pi compatible dev boards.
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Embedded vision cams use MIPI-CSI and USB3 Vision to hook up with Linux dev boards

Feb 8, 2019

Allied Vision’s Alvium embedded cameras include 1500 (MIPI-CSI) and 1800 (CSI and USB3) models, both with On Semi sensors at up to 2592 × 1944 and V4L2 drivers that support Jetson and i.MX6/8 dev boards.
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