Allied Vision’s Alvium embedded cameras include 1500 (MIPI-CSI) and 1800 (CSI and USB3) models, both with On Semi sensors at up 2592 × 1944 and V4L2 drivers that support Jetson and i.MX6/8 dev boards.
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Intel is phasing out its lightweight Quark processors, with final orders wrapping up this summer, and shipments ending in 2022. The Quark suffered from growing competition from high-end MCUs and low-end Cortex-A7 chips and the lack of a clear market focus.
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Wave Computing will follow in RISC-V’s path by offering its MIPS ISA as “open source” code without royalties or proprietary licensing. The MIPS Open initiative will focus on the development of SoCs for emerging IoT edge applications.
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Phytec’s “phyCore-AM65x SOM” and dev kit runs Linux on TI’s new AM65x SoC, which combines 4x Cortex-A53 cores, a PowerVR GPU, 2x Cortex-R5F MCUs, and 6x real-time PRU chips that support up to 6x TSN capable GbE ports.
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Microchip’s Microsemi unit unveiled a low power, real-time deterministic “PolarFire SoC” architecture for Linux edge devices that combines its PolarFire FPGA with 4x RISC-V CPU cores supplied by SiFive.
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The RISC-V Foundation and the Linux Foundation agreed to a collaboration to accelerate open source development for the open source RISC-V ISA, starting with RISC-V starter guides for Linux and Zephyr.
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[Updated: Nov. 16] — Intrinsyc’s compact “Open-Q 605” SBC for computer vision and edge AI applications runs Android Oreo and Qualcomm’s Vision Intelligence Platform on Qualcomm’s IoT-focused, octa-core QCS605. Also new: an Oreo-based Open-Q 624A Development Kit with a Snapdragon 624.
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Intel has launched a $99 “Neural Compute Stick 2” AI accelerator built around a new Myriad X VPU that adds a Neural Compute Engine and more cores for up to 8x greater performance.
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[Updated: 2PM] — Hangzhou C-SKY has launched a “C-SKY Linux Development Board” for $5.60 and up, featuring a 574MHz GX6605S CK610M SoC, 64MB DDR2 with a novel C-SKY ISA, plus an HDMI port, and 2x USB 2.0 ports.
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Intrinsyc has launched an Android-based Open-Q 2500 SOM module and development kit for smartwatches based on the Snapdragon 2500. Meanwhile, Fossil unveiled the first watch to run Wear OS on the next-gen Snapdragon 3100.
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[Updated: Nov. 10] — Bitmain announced a “Sophon BM1880 EDB” 96Boards CE SBC featuring its new Sophon BM1880 AI chip plus dual Cortex-A53 cores that run Linux. There’s also a RISC-V MCU and optional Raspberry Pi and Arduino modules.
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All signs point to a happy marriage between Linux and RISC-V. At Embedded Linux Conference Europe, Comcast’s Khem Raj gave a presentation that strengthens the case.
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[Updated: Nov. 13] — SiFive announced a new line of RISC-V based, SiFive Core IP 7 Series cores, including the Linux-friendly, Cortex-A55 like U74 and quad-core U74-MC, a variant that adds an MCU for real-time, latency sensitivity.
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Arm has extended its Cortex-M oriented DesignStart program to Cortex-A5 SoCs running Linux. The SoC development platform starts at $75,000 for Cortex-A5 IP access and a year of design support.
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