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ARM/FPGA module offers PCIe and HSMC expansion

Dec 13, 2013  |  Eric Brown
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iWave tipped a Linux-ready Qseven module called the iW-RainboW-G17M-Q7, using Altera’s Cortex-A9/FPGA Cyclone V SX SoC and offering HSMC and PCIe expansion.

Altera’s 28nm Cyclone V system-on-chip (SoC) has been out a year now and has appeared in an SODIMM-style Critical Link MityARM-5CSX COM and the Sockit Development Kit single board computer from Terasic. Like the similar Xilinx Zynq SoC, the Cyclone V combines field programmable gate array (FPGA) logic — in this case, similar to that found in Altera’s Stratix V FPGAs — with a more developer-accessible, dual-core ARM Cortex-A9 processor. Like the Zynq, the Cyclone V uses a high-speed AXI interconnect to closely link a dual-core, 800MHz ARM Cortex-A9 subsystem — called the “Hard Processor System” (HPS) — with an FPGA.



iW-RainboW-G17M-Q7
(click image to enlarge)

 

iWave’s iW-RainboW-G17M-Q7 module adopts the 70 x 70mm seven Qseven 2.0 form-factor. The 230-pin Qseven edge connectors hook up to both the ARM-based HPS and the FPGA, and the board offers a separate 80-pin connector featuring additional HSMC (high speed mezzanine card) expansion interfaces with the FPGA. The COM is said to support automation and process control applications like programmable logic controllers (PLCs), I/O modules, machine vision, and surveillance.

Onboard memory includes 512MB DDR3 for the HPS and 256MB DDR3 for the FPGA subsystems. According to the press release, but not the data sheet, the latter is upgradable to 512MB, as well. The announcement also mentions an unstated amount of NAND flash, but the data sheet only notes 16MB of QSPI flash for the HPS and an unstated amount of QSPI flash for the FPGA, with FPGA-directed EPCQ flash available as an option. There’s also an onboard microSD slot.



iW-RainboW-G17M-Q7 block diagram
(click image to enlarge)

 

The HPS-directed portion of the Qseven connector pins include gigabit Ethernet, four USB 2.0 ports, plus CAN, SPI, I2C, SD, and debug UARTs. The FPGA pins include interfaces like LVDS, audio, and PWM.

Separate high-speed interfaces for FPGA that ride the Qseven connectors include SATA and PCI-Express x4. According to iWave, this is the first ARM-based module to support PCIe x4. However, Critical Links Cyclone V-based MityARM-5CSX is also said to offer a PCI Express x4 “hard core.” If any of the Qseven FPGA interfaces are not used for Qseven compliance, the pins “can be used for custom industrial/networking interface requirements,” says iWave.

In addition to the Qseven interfaces, the iW-RainboW-G17M-Q7 also offers an 80-pin connector to the FPGA that is said to be compatible with HSMC expansion cards. These are said to support third-party cards, which would presumably include the Terasic HSMC daughter cards provided for the aforementioned Sockit SBC, including add-ons for analog I/O, HDMI, DVI, and GPIO.

The iWave COM accepts 5V DC input and offers industrial temperature support. BSPs are available for Linux and WEC7.

Specifications listed for the iW-RainboW-G17M-Q7 include:

  • Processor — Altera Cyclone V SX (2x Cortex-A9 cores @ 800MHz) HPS; FPGA (110K LEs)
  • Memory:
    • 512MB DDR3 with ECC
    • 16MB QSPI flash
    • MicroSD slot
    • 256MB to 512MB DDR3 for FPGA
    • EPCQ flash and QSPI Flash for FPGA
    • EEPROM (optional)
  • Onboard peripherals – optional JTAG headers for HPS and FPGA; boot DIPs; RTC controller
  • Qseven edge connector interfaces:
    • From HPS:
      • Gigabit Ethernet (on-board PHY)
      • 4x USB 2.0 host (on-board hub)
      • CAN
      • SD/MMC (8-bit), shares interface with onboard microSD
      • 2x I2C
      • SPI
      • General purpose UART
      • Debug UART
      • Other control interfaces (via HPS)
    • From FPGA:
      • 2x LVDS LCD (FPGA soft IP with 23x SE’s)
      • AC97/I2S audio (FPGA soft IP with 5x SE’s)
      • PWM
      • FPGA interfaces (8x CMOS)
    • From FPGA high-speed transceivers — SATA (FPGA soft IP); PCIe Gen2 x4
  • 80-pin HSMC expansion connector:
    • FPGA with up to 45x Single Ended (SE) interfaces)
    • 9x TX LVDS pairs, 18x SE’s
    • 11x RX LVDS pairs, 22x SE’s
    • 10x SE’s
    • 5x SE’s
    • FPGA dedicated general purpose clock inputs – 2x LVDS/2x SE’s; 1x LVDS/2x SE’s
  • Power — 5V DC input
  • Operating temperature — -40 to 85°C
  • Dimensions — 70 x 70mm (Qseven 2.0)
  • Operating system — Linux; Windows Embedded Compact 7

In October, Altera announced yet another hybrid ARM/FPGA SoC, this time based on the higher end Stratix 10 FPGA and 64-bit ARM Cortex-A53 processor. The Linux-friendly Stratix 10 SX SoC is notable for being the first processor to be manufactured with Intel’s 14nm 3D Tri-Gate process. When it begins sampling next year, the SoC will incorporate a quad-core 64-bit ARM Cortex-A53 subsystem integrated with floating-point DSP blocks and gigahertz-speed FPGA fabric that is claimed to offer twice the core performance of previous Stratix FPGAs.

 
Further information

No pricing or availability information was provided by iWave for the iW-RainboW-G17M-Q7. More information may be found on the iW-RainboW-G17M-Q7 product page.

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